Difference between revisions of "RF5C164"

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The '''RF5C68A''' is a PCM playback chip that is capable of playing eight simultaneous channels.
+
The '''RF5C68A''' is a PCM playback chip that is capable of playing eight simultaneous channels. Samples are stored in sign-magnitude format instead of Two's Compliment, but conversion can be achieved by flipping the most significant bit of the sample.
 +
 
 +
Note that this article is written in the context of the [[Mega CD]] — while the information still applies to this chip in other systems, absolute addresses may not be the same as they are elsewhere. Please use caution when using this reference.
 +
 
 +
== Sample Storage ==
 +
In order to hold samples, the RF5C164 can connect to up to 64 KB of Mask ROM, PSRAM, or SRAM. In the case of RAM, this memory is accessible to the system the RF5C164 is connected to through windows of 4 KB each. This window is located at <code>$1000</code> and goes up to <code>$1FFF.</code> To write to all of the memory, a banking mechanism is instituted in the chip that can change which of the 16 banks is currently accessible through this window. The active window can be changed through the [[#Control Register|control register.]]
 +
 
 +
Note that the RF5C164 uses <code>$FF</code> as a loop marker in audio samples, thus preventing it from being used as an actual audio value. The value can often be replaced with <code>$FE</code> with no adverse effects.
 +
 
 +
== Registers ==
 +
To control various aspects of the sample playback, including sample rate, panning, volume, address, as well as loop point, the RF5C164 has several registers through which these settings can be controlled. All registers except the sample start address are banked and will change depending on what channel is selected through the [[#Control Register|control register.]]
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 +
=== Register Map ===
 +
{| class="wikitable" width="320px"
 +
|-
 +
! Address
 +
! Function
 +
|-
 +
| <code>$0000</code>
 +
| Envelope
 +
|-
 +
| <code>$0001</code>
 +
| Pan
 +
|-
 +
| <code>$0002</code>
 +
| Address increment low
 +
|-
 +
| <code>$0003</code>
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| Address increment high
 +
|-
 +
| <code>$0004</code>
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| Loop start address low
 +
|-
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| <code>$0005</code>
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| Loop start address high
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|-
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| <code>$0006</code>
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| Sample start address (high only)
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|-
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| <code>$0007</code>
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|  [[#Control Register|Control Register]]
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|-
 +
| <code>$0008</code>
 +
| Channel on/off
 +
|}
 +
 
 +
=== Control Register ===
 +
{| class="wikitable" width="320px"
 +
|-
 +
! colspan="8" | <code>$0007</code> - Control Register
 +
|-
 +
! 7
 +
! 6
 +
! 5
 +
! 4
 +
! 3
 +
! 2
 +
! 1
 +
! 0
 +
|-
 +
| align="center" rowspan="2" | SE
 +
| align="center" rowspan="2" | MOD
 +
| align="center" rowspan="2" | 0
 +
| align="center" rowspan="2" | 0
 +
| align="center" | WB3
 +
| align="center" | WB2
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| align="center" | WB1
 +
| align="center" | WB0
 +
|-
 +
| align="center" | 0
 +
| align="center" | CB2
 +
| align="center" | CB1
 +
| align="center" | CB0
 +
|}
 +
 
 +
* '''SE:''' When set, the chip begins producing sound, disabling all of the eight channels when cleared.
 +
* '''MOD:''' Controls the selection of what the lower four bits of the register do. When set to one, CB2-CB0 are read.
 +
 
 +
==== MOD = 1 ====
 +
* '''CB2-CB0:''' Channel to access through channel control registers (<code>$0000</code> to <code>$0006</code>)
 +
 
 +
==== MOD = 0 ====
 +
* '''WB3-WB0:''' Bank to access through the PCM memory window.
 +
 
 +
The value contained in these bits is multiplied by <code>$1000</code> and added to the lower 12 bits of the address when the PCM memory window is accessed.
 +
 
 +
=== Envelope ===
 +
{| class="wikitable" width="320px"
 +
|-
 +
! colspan="8" | <code>$0000</code> - Envelope
 +
|-
 +
! 7
 +
! 6
 +
! 5
 +
! 4
 +
! 3
 +
! 2
 +
! 1
 +
! 0
 +
|-
 +
| align="center" colspan="8" | ENV
 +
|}
 +
* '''ENV:''' This value is multiplied with the low 7 bits of the sample data to produce an unsigned 16-bit value.
 +
 
 +
=== Pan ===
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{| class="wikitable" width="320px"
 +
|-
 +
! colspan="8" | <code>$0001</code> - Pan
 +
|-
 +
! 7
 +
! 6
 +
! 5
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! 4
 +
! 3
 +
! 2
 +
! 1
 +
! 0
 +
|-
 +
| align="center" colspan="4" | R
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| align="center" colspan="4" | L
 +
|}
 +
* '''R''' and '''L:''' 4-bit values that are multiplied by the unsigned 16-bit value created after envelope calculation, resulting in a 19-bit unsigned value.
 +
 
 +
=== Address increment ===
 +
This group of registers specifies the amount to increment the sample address by each sound cycle.
 +
 
 +
{| class="wikitable" width="320px"
 +
|-
 +
! colspan="8" | <code>$0002</code> - Address Increment Low
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!
 +
! colspan="8" | <code>$0008</code> - Address Increment High
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|-
 +
! 7
 +
! 6
 +
! 5
 +
! 4
 +
! 3
 +
! 2
 +
! 1
 +
! 0
 +
!
 +
! 7
 +
! 6
 +
! 5
 +
! 4
 +
! 3
 +
! 2
 +
! 1
 +
! 0
 +
|-
 +
| align="center" colspan="8" | FDL
 +
|
 +
| align="center" colspan="8" | FDH
 +
|}
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 +
When a certain bit in each register is set, a value associated with that bit is added to the address each sample cycle. These values are:
 +
{| class="wikitable" width="320px"
 +
|-
 +
! Bit
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! FDL Increment
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! FDH Increment
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|-
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| 7
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| 2<sup>-4</sup>
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| 2<sup>4</sup>
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|-
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| 6
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| 2<sup>-5</sup>
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| 2<sup>3</sup>
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|-
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| 5
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| 2<sup>-6</sup>
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| 2<sup>2</sup>
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|-
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| 4
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| 2<sup>-7</sup>
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| 2<sup>1</sup>
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|-
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| 3
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| 2<sup>-8</sup>
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| 2<sup>0</sup>
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|-
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| 2
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| 2<sup>-9</sup>
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| 2<sup>-1</sup>
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|-
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| 1
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| 2<sup>-10</sup>
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| 2<sup>-2</sup>
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|-
 +
| 0
 +
| 2<sup>-11</sup>
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| 2<sup>-3</sup>
 +
|}
 +
 
 +
=== Loop Start Address ===
 +
These two registers, located at <code>$0004</code> for the low byte, and <code>$0005</code> for the high byte, store the address that will be loaded into the channel's playback address once $FF is read as sample data.
 +
 
 +
=== Sample Start Address ===
 +
This register, located at <code>$0006</code> stores the high byte of the start of the sample. The low byte of the address is always set to <code>$00</code> and writes to this register will immediately load this combined value into the channel's pointer, starting playback at the new location on the next sample clock.
 +
 
 +
=== Channel on/off ===
 +
{| class="wikitable" width="320px"
 +
|-
 +
! colspan="8" | <code>$0008</code> - Channel On/Off
 +
|-
 +
! 7
 +
! 6
 +
! 5
 +
! 4
 +
! 3
 +
! 2
 +
! 1
 +
! 0
 +
|-
 +
| align="center" | CH8
 +
| align="center" | CH7
 +
| align="center" | CH6
 +
| align="center" | CH5
 +
| align="center" | CH4
 +
| align="center" | CH3
 +
| align="center" | CH2
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| align="center" | CH1
 +
|}
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 +
Each bit in this register corresponds to a certain channel, and when set, the corresponding channel will produce sound. The control register's master on/off bit has priority over this register, meaning that if the control register's on/off flag is clear, no sound will be produced, no matter what.
 +
 
 +
=== PCM RAM Locations ===
 +
The register pairs at <code>$0010</code> to <code>$001F</code> can be read to determine the location that the channel is playing. The even addresses hold the low byte, whereas odd ones hold the high bytes. The first registers at <code>$0010</code> specify channel one, going up to channel two at <code>$0012</code> and so on.
 +
 
 +
== Datasheet ==
 +
{{Download
 +
| title=RF5C68A Datasheet
 +
| version=
 +
| file=RF5C68A.pdf
 +
| filesize=512KB
 +
| description=Datasheet for the RF5C68A, a chip similar to the RF5C164.
 +
}}
  
 
[[Category:Hardware]]
 
[[Category:Hardware]]
 
[[Category:MegaCD]]
 
[[Category:MegaCD]]

Latest revision as of 11:29, 16 March 2015

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The RF5C68A is a PCM playback chip that is capable of playing eight simultaneous channels. Samples are stored in sign-magnitude format instead of Two's Compliment, but conversion can be achieved by flipping the most significant bit of the sample.

Note that this article is written in the context of the Mega CD — while the information still applies to this chip in other systems, absolute addresses may not be the same as they are elsewhere. Please use caution when using this reference.

Sample Storage

In order to hold samples, the RF5C164 can connect to up to 64 KB of Mask ROM, PSRAM, or SRAM. In the case of RAM, this memory is accessible to the system the RF5C164 is connected to through windows of 4 KB each. This window is located at $1000 and goes up to $1FFF. To write to all of the memory, a banking mechanism is instituted in the chip that can change which of the 16 banks is currently accessible through this window. The active window can be changed through the control register.

Note that the RF5C164 uses $FF as a loop marker in audio samples, thus preventing it from being used as an actual audio value. The value can often be replaced with $FE with no adverse effects.

Registers

To control various aspects of the sample playback, including sample rate, panning, volume, address, as well as loop point, the RF5C164 has several registers through which these settings can be controlled. All registers except the sample start address are banked and will change depending on what channel is selected through the control register.

Register Map

Address Function
$0000 Envelope
$0001 Pan
$0002 Address increment low
$0003 Address increment high
$0004 Loop start address low
$0005 Loop start address high
$0006 Sample start address (high only)
$0007 Control Register
$0008 Channel on/off

Control Register

$0007 - Control Register
7 6 5 4 3 2 1 0
SE MOD 0 0 WB3 WB2 WB1 WB0
0 CB2 CB1 CB0
  • SE: When set, the chip begins producing sound, disabling all of the eight channels when cleared.
  • MOD: Controls the selection of what the lower four bits of the register do. When set to one, CB2-CB0 are read.

MOD = 1

  • CB2-CB0: Channel to access through channel control registers ($0000 to $0006)

MOD = 0

  • WB3-WB0: Bank to access through the PCM memory window.

The value contained in these bits is multiplied by $1000 and added to the lower 12 bits of the address when the PCM memory window is accessed.

Envelope

$0000 - Envelope
7 6 5 4 3 2 1 0
ENV
  • ENV: This value is multiplied with the low 7 bits of the sample data to produce an unsigned 16-bit value.

Pan

$0001 - Pan
7 6 5 4 3 2 1 0
R L
  • R and L: 4-bit values that are multiplied by the unsigned 16-bit value created after envelope calculation, resulting in a 19-bit unsigned value.

Address increment

This group of registers specifies the amount to increment the sample address by each sound cycle.

$0002 - Address Increment Low $0008 - Address Increment High
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
FDL FDH

When a certain bit in each register is set, a value associated with that bit is added to the address each sample cycle. These values are:

Bit FDL Increment FDH Increment
7 2-4 24
6 2-5 23
5 2-6 22
4 2-7 21
3 2-8 20
2 2-9 2-1
1 2-10 2-2
0 2-11 2-3

Loop Start Address

These two registers, located at $0004 for the low byte, and $0005 for the high byte, store the address that will be loaded into the channel's playback address once $FF is read as sample data.

Sample Start Address

This register, located at $0006 stores the high byte of the start of the sample. The low byte of the address is always set to $00 and writes to this register will immediately load this combined value into the channel's pointer, starting playback at the new location on the next sample clock.

Channel on/off

$0008 - Channel On/Off
7 6 5 4 3 2 1 0
CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1

Each bit in this register corresponds to a certain channel, and when set, the corresponding channel will produce sound. The control register's master on/off bit has priority over this register, meaning that if the control register's on/off flag is clear, no sound will be produced, no matter what.

PCM RAM Locations

The register pairs at $0010 to $001F can be read to determine the location that the channel is playing. The even addresses hold the low byte, whereas odd ones hold the high bytes. The first registers at $0010 specify channel one, going up to channel two at $0012 and so on.

Datasheet

Download.png Download RF5C68A Datasheet
File: RF5C68A.pdf (512KB) (info)

Datasheet for the RF5C68A, a chip similar to the RF5C164.